1. Field of the Invention
The present invention relates to a technology for manufacturing a semiconductor device, and particularly to a semiconductor device having an SOI (Silicon on Insulator) and capable of setting up a back potential thereof, a method of manufacturing the same, and a semiconductor wafer constituted by the semiconductor device.
This application is a counterpart of Japanese Patent Application, Serial Number 304720/2000, filed Oct. 4, 2000, the subject matter of which is incorporated herein by reference.
2. Description of the Related Art
A conventional semiconductor device having an SOI substrate has been described in Japanese Patent Application Laid-Open No. Hei 11-354631. The conventional semiconductor device will be explained with reference to the accompanying drawing.
FIG. 18 is a cross-sectional view showing a configuration of a conventional semiconductor device. The conventional semiconductor device has a semiconductor substrate 1804 in which a semiconductor layer 1803 is provided over a semiconductor support substrate 1801 with a silicon oxide film 1802 interposed therebetween. The semiconductor substrate 1804 has a chip or element forming area 1800 for forming circuits such as transistors, etc., and a substrate potential taking-out area 1820 for fixing a potential for the semiconductor support substrate 1801. Now, an insulation separating layer 1805 is formed between the element forming area 1800 and the substrate potential taking-out area 1820. The element forming area 1800 adjoin the insulation separating layer 1805 and is surrounded by the insulation separating layer 1805. The conventional semiconductor device has a conductive layer 1806 provided within the substrate potential taking-out area 1820, which extends through the silicon oxide film 1802 from the semiconductor layer 1803 so as to reach the semiconductor support substrate 1801. Thus, the conventional semiconductor device serves so as to supply a potential from the semiconductor layer 1803 to the semiconductor support substrate 1801 through an electrode 1807 and the conductive layer 1806. Accordingly, the potential supplied to the semiconductor support substrate 1801 is fixed.
In the conventional semiconductor device, however, the semiconductor layer 1803 exists between the conductive layer 1806 and the insulation separating layer 1805, and the semiconductor layer 1803 exists even between the conductive layer 1806 and an edge portion of the semiconductor device, as shown in FIG. 18. Namely, the conductive layer formed within the substrate potential taking-out area is surrounded by the semiconductor layer in the conventional semiconductor device. Therefore, a problem arises in that the substrate potential taking-out area becomes wide by the width of the semiconductor layer. A semiconductor device called a xe2x80x9cwafer level CSP (Wafer Level Chip Size Package)xe2x80x9d, which has been considered in recent years, must avoid such a problem. This is because the semiconductor device called xe2x80x9cthe wafer level CSPxe2x80x9d is a package having substantially the same width as a chip size and requires the technology of narrowing an area other than the element forming area.
The present invention aims to provide a semiconductor device capable of setting a substrate potential taking-out area for fixing a potential (back potential) for a semiconductor support substrate thereof, as narrow as possible.
A summary of a typical one of the inventions disclosed in the present application will be explained in brief as follows:
A semiconductor device according to the present invention comprises a semiconductor substrate for a base, which has an element forming area and an edge area for surrounding the element forming area, a buried oxide film provided over a first surface of the base semiconductor substrate in the element forming area, an element forming semiconductor substrate provided over a first surface of the buried oxide film, an insulating film provided over the element forming semiconductor substrate, a third surface of the buried oxide film, and the first surface of the base semiconductor substrate in the edge area, a conductive layer provided over the insulating film and the first surface of the base semiconductor substrate in the edge area, a conductive columnar member provided so as to be electrically connected to the conductive layer, and a sealing member for sealing a third surface of the conductive columnar member and the conductive layer.
According to the above means, a semiconductor device can be provided which is capable of setting a substrate potential taking-out area for forming a conductive layer used to fix a back potential of the semiconductor device, as narrow as possible.